Semiconductors and the Hand-Carry Economy — Why Chips Still Travel by Courier

The global semiconductor market hit $611 billion in revenue in 2025, according to the Semiconductor Industry Association. The chips that power everything from smartphones to MRI machines are manufactured in processes measured in nanometres, inside cleanrooms where a single speck of dust can destroy a $50,000 wafer. The supply chain that supports this industry is, in theory, one of the most sophisticated on earth.

In practice, the most urgent shipments in the semiconductor supply chain still move the way they did four decades ago: hand-carried by an on-board courier on a commercial flight, packed in anti-static FOUP containers, vibration-dampened cases, or custom ESD-safe packaging that fits in an overhead bin.

Why standard logistics fails chips

Semiconductors present a unique logistics challenge that no amount of supply chain optimisation can fully solve. The problem isn't the routine movement of finished chips from fabs to assembly plants — that works fine on scheduled freight. The problem is everything else: engineering samples that need to reach a design team in 18 hours, not 72. Photomask sets for a new tape-out that cannot be delayed without pushing back an entire product launch. Replacement parts for a lithography tool that costs $500,000 per day when it's down.

These shipments share three characteristics that make them poor candidates for standard air freight. They're low-weight but extremely high-value. They're vibration-sensitive and often require specific orientation during transit. And they're urgent in a way that standard logistics simply cannot accommodate — the cost of delay is measured not in shipping surcharges but in lost production, missed market windows, and contractual penalties.

The TSMC-to-Dresden pipeline

The semiconductor industry's geographic concentration makes the OBC requirement particularly acute. Advanced chip fabrication is overwhelmingly concentrated in Taiwan (TSMC), South Korea (Samsung), and increasingly the United States (Intel's new fabs in Arizona and Ohio). But chip design happens everywhere — London, Munich, Tel Aviv, Bangalore, Austin. And chip consumers are global.

The new European Chips Act fabs — including TSMC's Dresden facility and Intel's Magdeburg plant — are creating an entirely new set of OBC corridors. Engineering samples now need to move between Hsinchu and Dresden. Photomasks travel between San Jose and Magdeburg. Test wafers shuttle between Pyeongtaek and Dublin. Each of these corridors has its own customs requirements, its own preferred routing, and its own set of couriers who understand the handling requirements.

What semiconductor shippers need from OBC

The semiconductor industry's OBC requirements are specific and non-negotiable. Anti-static handling is mandatory — couriers must use ESD-safe packaging and follow grounding protocols. Vibration control matters for wafers and photomasks that can be damaged by the kind of turbulence that a standard cargo hold experiences. Chain of custody documentation is required for export-controlled items, particularly anything involving EUV lithography components or advanced node designs subject to US export restrictions.

The industry also requires couriers who understand that a 300mm wafer FOUP container cannot be tilted, that a photomask pod must remain at a controlled temperature, and that the customs paperwork for a prototype chip entering the EU is substantially different from a commercial shipment of finished products.

As the semiconductor industry's geographic footprint expands — driven by government subsidies, supply chain resilience strategies, and geopolitical hedging — the OBC corridors will multiply. The couriers who build expertise in semiconductor hand-carry logistics now will be the ones who capture the high-value, high-frequency work that this expansion creates.